Senior Embedded SERDES Firmware/Diagnostics Engineer

About TYLsemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TYLsemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isn't a nice-to-have. It's the critical path.

Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.
• Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.

Remote-Friendly, Global Team

• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore

Move Fast, Ship Real Products

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

What We Value

• Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.
• Bias for action. We move fast. Analysis paralysis doesn't fly here.
• Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.
• Low ego, high standards. We don't care about titles or politics. We care about results.

The Ask

If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.

We're asking you to walk away from that and bet on us.

Here's why you should:

• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.

This is the bet. Join us and build something that matters.

Or stay comfortable. No judgment.

But if you're the kind of person who wants to take the shot, we'd love to talk.

READY TO JOIN?

Role Overview

We're hiring a senior firmware engineer to architect, develop, and bring up embedded firmware for Ethernet SerDes, retimers, and diagnostics. The role covers SerDes, calibration, manufacturing, and test firmware. You'll work closely with ASIC, module, manufacturing, test, and reliability teams. You'll define ARM and RISC-V control architectures, write digital requirements for custom control ASICs, build a solid firmware development and CI flow, and mentor engineers across programs.

What you'll do

• Architecture & Development: Architect, develop, debug, and release production firmware for next-generation optical engines and module platforms (SFP/QSFP/OSFP)
• ASIC & System Specification: Define digital requirements for custom control ASICs, including MCU selection, memory maps, boot sequence, peripherals, telemetry, diagnostics, MACsec engines, and PTP hardware timestamping
• System Integration: Partner with ASIC, RTL, and verification teams on architecture, board bring-up, and system-level debug
• Protocols & Interfaces: Build and maintain firmware for Ethernet, PCIe, and SerDes (link training, interop, compliance), PTP/IEEE 1588, MACsec, and host interfaces
• Bring-Up & Diagnostics: Lead first firmware bring-up on new modules and ASICs, and drive root-cause analysis across lab, qualification, and field returns
• Manufacturing & Calibration: Deliver firmware for manufacturing test, screening, calibration engines, and lookup tables that support high-yield production
• DevOps & CI/CD: Own the firmware workflow, including build/release pipelines, automated tests, regression coverage, and CI

What We're Looking For

• BS/MS/PhD in EE, CE, CS, or equivalent, with 8+ years in embedded firmware
• Expert C and C-based SDK development; exposure to modern C++ or Rust
• Experience defining MCU requirements (ARM, RISC-V) and working with I2C, I3C, SPI, MDIO, and GPIO
• Strong Python for test automation, data processing, and firmware QC
• Hands-on with GCC/Make, Git/GitHub, Doxygen, CI/CD, and hardware-in-the-loop automation
• Experience using AI-assisted coding, refactoring, and test generation in an embedded workflow
• A track record of leading cross-functional bring-up and mentoring engineers

Good to Have

• MACsec (802.1AE) key management or data-plane acceleration, and PTP hardware timestamping or clock recovery, in optical hardware
• Root of Trust, Secure Boot, and secure firmware update (FOTA/UFOTA)
• SerDes management, link-training tuning, and real-time diagnostic frameworks
• Product qualification, stress testing, reliability investigations, and board-level FA

Originally posted on Himalayas